[Mp4-tech] Early Bird Registration Open -- www.SoCconference.com The 5th International System-on-Chip (SoC) Conference and Exhibit, Nov 7 & 8, 2007

[Farhad Mafie]

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The Most Innovative and Affordably Priced Chip Design Technology
Conference of the Year
Don't Miss Out!
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  <http://img.constantcontact.com/letters/images/spacer.gif>  Special
Discount for Students and IEEE, ACM, & AeA Members 
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5th International System-on-Chip (SoC)
Conference, Workshop & Exhibit
November 7 & 8, 2007 - Radisson Hotel Newport Beach, California 
 <http://www.socconference.com/> Early Bird Registration Open Now . . .
Register Today & Save! 
 <http://www.socconference.com/> For Conference Information &
Registration, Please Visit: 
 <http://www.socconference.com/> www.SoCconference.com 
Leading-edge Companies, Universities, and Organizations will be
presenting their latest System-on-Chip (SoC), ASIC, ASSP, FPGA, and
Foundry technologies and products in this informative and exciting
Conference & Exhibit.  Selected participating companies and
universities:     
Tensilica,  Jazz Semiconductor,  MIPS Technologies,  Novelics,  Inside
GNSS,  Intel,  Broadcom, Toshiba,  eASIC,  Argon,  Altera,  Texas
Instruments,  ST Microelectronics,  NXP Semiconductors,  Texas A&M
University,  AMD,  Rambus,  SiRF,  iSuppli,  Fujitsu,  IBM,  Tower
Semiconductor,  ARM,  Fujitsu,  Nvidia,  Carnegie Mellon University,
Synopsys,  Cadence Design Systems,  The SPIRIT Consortium,  Mentor
Graphics,  Actel,  Trimble,  Virage Logic,  Micron,  National
Semiconductor,  Savant Company Inc.,  Innovative Silicon,  Kilopass
Technology,  Carbon Design Systems,  Silicon Canvas,  ENOVIA MatrixOne,
Faraday Technology,  CSU Fullerton,  UCI,  EDN,  eMemory,  Chapman
University,  IEEE,  AeA,  Qualcomm,  Kenet,  and many more. 
Four Informative Tracks
*	Semiconductor Technology & Trends: New Design Approaches for
Complex SoCs 
*	Multicore, CPUs, DSPs & NoCs for Complex SoCs 
*	Memory sub-system Issues, Advances & Trends for Complex SoC
Designs 
*	Innovative Tools & Solutions: For Complex SoC Designs 
Four Outstanding Keynote Speakers 
*	Dr. Marco Racanelli, Jazz Semiconductor, Vice President of
Technology & Engineering 
*	Dr. Jeff Parkhurst, Intel, Academic Research Programs Manager  
*	Dr. Ahmad Bahai, National Semiconductor, CTO  
*	Dr. Rob Rutenbar, Carnegie Mellon University     
Three Challenging Panel Discussions
*	Emerging Trends for Complex SoCs: From Advanced
Multicore/CPUs/DSPs To Innovative Embedded Memories.  Moderator:  Ron
Wilson, Executive Editor EDN 
*	Emerging Wireless Chips: The Development & Integration
Challenges.  Moderator: Glen Gibbons, Inside GNSS, Editor and Managing
Partner 
*	Structured ASICs: Dead or Alive.  Moderator: Steve Leibson, EDN
Contributing Editor. 
Several Outstanding Workshops by Tensilica, Savant, Etc. 
One Night of Tabletop Exhibitions ( November 7, 2007, 4:30 PM - 8:30 PM)
*	Sign up online for complimentary exhibition passes (Nov 7, 2007,
Exhibition night only). 
*	Meet one-on-one with SoC experts representing a wide variety of
companies 
*	Have your toughest questions answered by leading-edge companies!
*	Discuss development tools and chip design challenges with
SoC/ASIC/Foundry experts 
*	Connect with companies offering practical solutions to your
design challenges 
*	"Seeing Is Believing!" See demos of EDA tools from leading-edge
EDA vendors 
Why You Should Attend
*	Discuss 65nm and post-65nm challenges for SoC/ASIC/ASSP/FPGA
designs 
*	Learn about the latest configurable CPUs, Processors, and DSPs
cores 
*	Gain insight into memory subsystems design for complex
SoC/ASIC/ASSP/FPGA designs 
*	Learn about the new trends and future direction of
System-on-Chip 
*	Network with the leaders driving SoC technology during the
conference & exhibit 
*	Learn about the latest EDA Tools and design techniques for
Nanometer SoCs 
Who Should Attend 
*	Chip designers 
*	Design engineers 
*	ASIC/SoC/ASSP/FPGA designers 
*	EDA Developers 
*	System architects 
*	IP Developers   
*	Hardware engineers 
*	System platform designers 
*	Executives and business decision-makers in technology companies 
*	Technical  marketing/sales professionals 
*	Technology and business analysts 
*	Engineering professors and students 
*	Anyone involved with ASIC, SoC, ASSP, Foundry, and FPGA design,
development, planning, promotion, and procurement 
The 5th International System-on-Chip (SoC) Conference & Exhibit is the
year's most important, most informative technical conference for the
chip design community.  In collaboration with major industry enablers
and top academic experts, it addresses the latest technologies and
products from vendors in semiconductor, EDA, IP, CPUs/DSPs, Memories,
NoC, Multi-core, etc. 
Discount for Students and IEEE, ACM & AeA Members
The Most <http://www.socconference.com/>  Informative and Targeted SoC,
ASIC, ASSP, FPGA
Conference, Workshop & Exhibit
 <http://www.socconference.com/> Event of the Year!  
 <http://www.socconference.com/> Early Bird Registration Open Now . . .
Register Today & Save! 
Don't Miss Out! 
Please share this message with interested colleagues!
Got a registration question? 
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